Xilinx AXI DMA with AXI FIFO Stream
$750-1500 USD
Dibayar saat pengiriman
Objective: An OS image implements an AXI DMA to interact with an IP in the PL
Board Name: Xilinx ZCU102
We require the following:
- Creating Hardware Project in Vivado 2019.2.
- Creating the driver in Vitis
- Creating OS image in Petalinux 2019.2
- Python API: write to and read from the DMA
Deliverables:
- Vivado Project Files
- Vitis Project Files
- Petalinux Project Files
- Python API
ID Proyek: #28459993
Tentang proyek
2 freelancer rata-rata menawar $1445 untuk pekerjaan ini
Dear sir I have done similar work before, i can create the interface and add the library to work with AXI DMA, please message me so that we can discuss
Hi there, I'm bidding on your project "Xilinx AXI DMA with AXI FIFO Stream" Being an expert in Python and matlab programming I can do this project for you. please leave a message on my chat so we can discuss the budge Lebih banyak
