Building a VGA Display Driver, I/O Driver, and Memory Mapping!

Ditutup Dipasang Apr 20, 2016 Dibayar saat pengiriman
Ditutup Dibayar saat pengiriman

Specifics in attached .pdf's

Supporting source code will be supplied.

For someone with SystemVerilog/VHDL/FPGA/ASM experience this shouldn't take more than a few hours.

Must be completed by 4/26/2016 - Willing to negotiate Bonus if completed sooner.

FPGA Verilog / VHDL Perakit x86/x64

ID Proyek: #10272155

Tentang proyek

2 proposal Proyek online Aktif 7 tahun yang lalu

2 freelancer rata-rata menawar $211 untuk pekerjaan ini

ahmedmohamed85

A proposal has not yet been provided

$222 USD dalam 2 hari
(403 Ulasan)
7.8
islamrefaat

I have more than seven-year experience in digital design and HDL. I already did a similar project before and have some Verilog codes that may help in your project. I can finish this project over the weekend if you wish

$200 USD dalam 2 hari
(2 Ulasan)
2.5