coding and simulation in mentor graphics using verilog language

Dear sir, I have more than 6 years experience in verilog and vhdl design and simulation using mentor graphics, please read the reviews written on me to be sure that you will have perfect work, i am very interested in working with you and i hope you give me this chance, waiting your reply, best regards;

Dear! I have three years experience in ASIC field, good command in RTL design and coding with Verilog. I've been working for Dolphin Technology Inc (at San Jose, CA) since I graduated. Currently I'm designing RTL for PCI-Express controller core for my company. I used QuestaSim everyday to simulate my RTL code. I think I'm a suitable candidate for your project. Thank you for your consideration and waiting to hear from you.

Hi, I can work on this project.. I have loads of experience in working with VHDL / Verilog on Cadence / Mentor tools.. Let me know the details of your project.. I assure you HIGH QUALITY and BEST SERVICE from my side.. Regards, Harish

Hi there,I am having masters in VLSI design and having lot of experience in verilog HDL in mentor graphics model sim. To believe me you can check my last completed project review. Pay me after you completely satisfied with the work. ;-)

Consider it done. Check my past reviews for your reference. Eagerly waiting for your reply so that I can start with the implementation.

Hello, I have a pretty long experience with FPGA design using VHDL and verilog. Based on that I wish to take up this project. By Mentor Graphics simulator, I hope you mean ModelSim Please let me know more details. Since the extend of project is not known I have quoted 10 days. Regards Vinod

Hi I Have done Master degree from UK and have experience of vhdl / Verilog coding. Recently I have completed 10G project. Further see profile. I will do this job reliably.

Having 10 Years of frontend verification experience with Multinational companies. Worked with VHDL, Verilog, System Verilog and Specman. I have RTL design and verification experience with large and small designs. Also worked with Mentor tools for simulating designs and proving them with code and functional coverage.

I have experience in RTl verilog and verification with modelsim (Metor graphics) designing for FPGA and ASIC

Hi, I need more information to be more accurate regarding the number of days necessary to finish the task. If it's just counseling and some small parts of code 1-2 days should be enough. I'm a beginner on freelancer but I have experience with Verilog. I can understand VHDL but I have not wrote code using it. Regards, Florin

Hi, I have got 16 years of experience in Verilog ,VHDL programming. I have worked in Mentor Graphics for 10 years and have used simulation tools like Modelsim,Veloce emulator, I have worked extensively on FPGA design in Verilog/VHDL

Hi, I am a digital designer, familiar with vhdl, verilog, SV and psl. Working solely with MS & Questa. Please let me know on the design specs. Thanks, Alex

It's okay to me in helping you even for 75 USD, I have a long experience of HDL coding and simulation

A proposal has not yet been provided

I have worked in vreilog for 7+ years in all reputed companies. Please call me on +91 9845696897 for further talks regarding who will provide mentor graphics tool and all. Thanks, Suyog

I'm a final Year Engineering Undergraduate in Sri Lanka. I specialize in Electronic and Software Engineering and I'm the Top of my batch. Currently published 2 research papers one in electronic and other in software. I'm currently training at Atrenta. It is an EDA tool producing company. It is the 3rd largest EDA company in the world. I'm training as an Product Verification Engineer. So no need to tell that, I work on RTL codes and systems everyday. I can even test the system using the SpyGlass platform, which is unavailable to all the students. Only available for purchase industry users. So I can guarantee that the RTL codes written by me are 100% error free. Send your works, So I can complete them quickly and with least expense..

I have real time experience on VHDL and verilog related projects. I have more than 3+ yr experience in this field .

hie, i have done some projects using verilog HDL, like SPI CONTROLLER, and some small ,regular codes, simulate them with questa sim, if u can send me your requirement, i will try to get your work done asap.